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Datasheet, V1.1, 21 May 2004
F3
ICE3AS02 / ICE3BS02 ICE3AS02G / ICE3BS02G
Off-Line SMPS Current Mode Controller with integrated 500V Startup Cell
Power Management & Supply
Never
stop
thinking.
F3 Revision History: Previous Version: Page Subjects (major changes since last revision) 2004-05-21 Datasheet
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Edition 2004-05-21 Published by Infineon Technologies AG, St.-Martin-Strasse 53, D-81541 Munchen
(c) Infineon Technologies AG 1999. All Rights Reserved.
Attention please! The information herein is given to describe certain components and shall not be considered as warranted characteristics. Terms of delivery and rights to technical change reserved. We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. Infineon Technologies is an approved CECC manufacturer. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office in Germany or our Infineon Technologies Representatives worldwide (see address list). Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.
F3
ICE3AS02 / ICE3BS02 ICE3AS02G / ICE3BS02G
Off-Line SMPS Current Mode Controller with integrated 500V Startup Cell
Product Highlights
* Leadfree DIP package * Active Burst Mode to reach the lowest Standby Power Requirements < 100mW * Protection features (Auto Restart Mode) to increase robustness and safety of the system * Adjustable Blanking Window for high load jumps to increase system reliability
PG-DIP-8-6 test
P-DSO-8-8
Features
* * * * * * * * * * * * * * * Active Burst Mode for lowest Standby Power @ light load controlled by Feedback Signal Fast load jump response in Active Burst Mode 500V Startup Cell switched off after Start Up 100/67kHz internally fixed switching frequency Auto Restart Mode for Overtemperature Detection Auto Restart Mode for VCC Overvoltage Detection Auto Restart Mode for Overload and Open Loop Auto Restart Mode for VCC Undervoltage Blanking Window for short duration high current User defined Soft Start Minimum of external components required Max Duty Cycle 72% Overall tolerance of Current Limiting < 5% Internal PWM Leading Edge Blanking Soft switching for low EMI
Description
P DSO 8 3 6
The F3 Controller provides Active Burst Mode to reach the lowest Standby Power Requirements <100mW at no load. As the controller is always active during Active Burst Mode, there is an immediate response on load jumps without any black out in the SMPS. In Active Burst Mode the ripple of the output voltage can be reduced <1%. Furthermore, to increase the robustness and safety of the system, the device enters into Auto Restart Mode in the cases of Overtemperature, VCC Overvoltage, Output Open Loop or Overload and VCC Undervoltage. By means of the internal precise peak current limitation, the dimension of the transformer and the secondary diode can be lowered which leads to more cost efficiency. An adjustable blanking window prevents the IC from entering Auto Restart Mode or Active Burst Mode unintentionally in case of high load jumps.
Typical Application
+
85 ... 270 VAC HV
CBulk CVCC
Snubber
Converter DC Output
-
VCC
Startup Cell
PWM Controller Current Mode Precise Low Tolerance Peak Current Limitation
Gate CS RSense
Power Management
Control Unit
Active Burst Mode Auto Restart Mode
FB SoftS CSoftS
GND
ICE3AS02/G
ICE3BS02/G
Type ICE3AS02 ICE3BS02 ICE3AS02G ICE3BS02G
Ordering Code Q67040-S4661-A101 Q67040-S4637-A101
FOSC 100kHz 67kHz 100kHz 67kHz
Package PG-DIP-8-6 PG-DIP-8-6 P-DSO-8-8 P-DSO-8-8
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F3 ICE3AS02 / ICE3AS02G / ICE3BS02 / ICE3BS02G
Table of Contents 1 1.1 1.2 1.3 2 3 3.1 3.2 3.3 3.4 3.4.1 3.4.2 3.4.3 3.5 3.5.1 3.5.2 3.6 3.6.1 3.6.2 3.6.2.1 3.6.2.2 3.6.2.3 3.6.3 4 4.1 4.2 4.3 4.3.1 4.3.2 4.3.3 4.3.4 4.3.5 4.3.6 4.3.7 5 6 Page
Pin Configuration and Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 Pin Configuration with PG-DIP-8-6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 Pin Configuration with P-DSO-8-8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 Pin Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6 Representative Blockdiagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 Power Management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 Startup Phase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 PWM Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 PWM-Latch FF1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 Gate Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 Current Limiting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 Leading Edge Blanking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 Propagation Delay Compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 Control Unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 Adjustable Blanking Window . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 Active Burst Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 Entering Active Burst Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 Working in Active Burst Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 Leaving Active Burst Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 Protection Mode(Auto Restart Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17 Supply Section 1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17 Supply Section 2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17 Internal Voltage Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17 PWM Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18 Control Unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18 Current Limiting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19 Driver Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20 Typical Performance Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . .21 Outline Dimension . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
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Pin Configuration and Functionality
1
1.1
Pin Configuration and Functionality
Pin Configuration with PG-DIP-8-6 1.2 Pin Configuration with P-DSO-8-8
Pin 1 2 3 4 5 6 7 8
Symbol SoftS FB CS HV HV Gate VCC GND
Function Soft-Start Feedback Current Sense High Voltage Input High Voltage Input Driver Stage Output Controller Supply Voltage Controller Ground
Pin 1 2 3 4 5 6 7 8
Symbol SoftS FB CS Gate HV N.C. VCC GND
Function Soft-Start Feedback Current Sense Driver Stage Output High Voltage Input Not connected Controller Supply Voltage Controller Ground
Package PG-DIP-8-6
Package P-DSO-8-8
SoftS
1
8
GND
SoftS
1
8
GND
FB
2
7
VCC
FB
2
7
VCC
CS
3
6
Gate
CS
3
6
N.C.
HV
4
5
HV
Gate
4
5
HV
Figure 1 Note:
Pin Configuration PG-DIP-8-6(top view) Pin 4 and 5 are shorted within the DIP package.
Figure 2
Pin Configuration P-DSO-8-8(top view)
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F3 ICE3AS02 / ICE3AS02G / ICE3BS02 / ICE3BS02G
Pin Configuration and Functionality 1.3 Pin Functionality
SoftS (Soft Start & Auto Restart Control) The SoftS pin combines the functions of Soft Start during Start Up and error detection for Auto Restart Mode. These functions are implemented and can be adjusted by means of an external capacitor at SoftS to ground. This capacitor also provides an adjustable blanking window for high load jumps, before the IC enters into Auto Restart Mode. FB (Feedback) The information about the regulation is provided by the FB Pin to the internal Protection Unit and to the internal PWM-Comparator to control the duty cycle. The FBSignal controls in case of light load the Active Burst Mode of the controller. CS (Current Sense) The Current Sense pin senses the voltage developed on the series resistor inserted in the source of the external PowerMOS. If CS reaches the internal threshold of the Current Limit Comparator, the Driver output is immediately switched off. Furthermore the current information is provided for the PWMComparator to realize the Current Mode. Gate The Gate pin is the output of the internal driver stage connected to the Gate of an external PowerMOS. HV (High Voltage) The HV pin is connected to the rectified DC input voltage. It is the input for the integrated 500V Startup Cell. VCC (Power supply) The VCC pin is the positive supply of the IC. The operating range is between 8.5V and 21V. GND (Ground) The GND pin is the ground of the controller.
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2
Figure 3
+ CBulk Snubber
Version 1.1
Converter DC Output VOUT CVCC
85 ... 270 VAC
HV
Power Management
VCC Startup Cell
6.5V
Internal Bias
RSoftS Voltage Reference
VCC
3.25k 6.5V
SoftS
Undervoltage Lockout
15V Duty Cycle Max 0.72 8.5V
T2
GND
T3 Power-Down Reset
PWM Section
1V
T1 Oscillator
Duty Cycle max
CSoftS
5k
VCC
C1 Spike Blanking 8.0us
Soft Start
Clock
Representative Blockdiagram
Soft-Start Comparator & G7 Gate Driver & G9 1 G8 FF1 S RQ C7
17V
4.4V
& G1
4.0V
C11
Thermal Shutdown
Tj >140C
C2
S1
4.0V
1
G2
Gate
Representative Blockdiagram
F3 ICE3AS02 / ICE3AS02G / ICE3BS02 / ICE3BS02G
7
PWM Comparator C8 Propagation-Delay Compensation
0.85V
C3
5.4V
6.5V
4.8V Auto Restart Mode
&
RFB
C4
G5 Vcsth Leading Edge Blanking 220ns
5k Active Burst Mode C10 x3.7 PWM OP C12 0.257V & G11 Current Mode & G10
FB
& G6
C5
10k 1pF D1
CS
RSense
1.32V
10pF
C6a
4.0V
Current Limiting
C6b
Control Unit
3.4V
ICE3AS02/G
ICE3BS02/G
ICE3AS02/G
ICE3BS02/G 67kHz
Representative Blockdiagram
fOSC
100kHz
21 May 2004
F3 ICE3AS02 / ICE3AS02G / ICE3BS02 / ICE3BS02G
Functional Description
3
Functional Description
3.2 Power Management
VCC
Startup Cell
All values which are used in the functional description are typical values. For calculating the worst cases the min/max values which can be found in section 4 Electrical Characteristics have to be considered.
HV
3.1
Introduction
The F3 is the further development of the F2 to meet the requirements for the lowest Standby Power at minimum load and no load conditions. A new fully integrated Standby Power concept is implemented into the IC in order to keep the application design easy. Compared to F2 no further external parts are needed to achieve the lowest Standby Power. An intelligent Active Burst Mode is used for this Standby Mode. After entering this mode there is still a full control of the power conversion by the secondary side via the same optocoupler that is used for the normal PWM control. The response on load jumps is optimized. The voltage ripple on Vout is minimized. Vout is further on well controlled in this mode. The usually external connected RC-filter in the feedback line after the optocoupler is integrated in the IC to reduce the external part count. Furthermore a high voltage startup cell is integrated into the IC which is switched off once the Undervoltage Lockout on-threshold of 15V is exceeded. The external startup resistor is no longer necessary. Power losses are therefore reduced. This increases the efficiency under light load conditions drastically. The Soft-Start capacitor is also used for providing an adjustable blanking window for high load jumps. During this time window the overload detection is disabled. With this concept no further external components are necessary to adjust the blanking window. An Auto Restart Mode is implemented in the IC to reduce the average power conversion in the event of malfunction or unsafe operating condition in the SMPS system. This feature increases the system's robustness and safety which would otherwise lead to a destruction of the SMPS. Once the malfunction is removed, normal operation is automatically initiated after the next Start Up Phase. The internal precise peak current limitation reduces the costs for the transformer and the secondary diode. The influence of the change in the input voltage on the power limitation can be avoided together with the integrated Propagation Delay Compensation. Therefore the maximum power is nearly independent on the input voltage which is required for wide range SMPS. There is no need for an extra over-sizing of the SMPS, e.g. the transformer or PowerMOS.
Power Management
Undervoltage Lockout 15V
Internal Bias
8.5V
6.5V
Voltage Reference
Auto Restart Mode
T1
Active Burst Mode
SoftS
Figure 4
Power Management
The Undervoltage Lockout monitors the external supply voltage VVCC. When the SMPS is plugged to the main line the internal Startup Cell is biased and starts to charge the external capacitor CVCC which is connected to the VCC pin. This VCC charge current which is provided by the Startup Cell from the HV pin is 1.05mA. When VVCC exceeds the on-threshold VCCon=15V the internal voltage reference and bias circuit are switched on. Then the Startup Cell is switched off by the Undervoltage Lockout and therefore no power losses present due to the connection of the Startup Cell to the bus voltage (HV). To avoid uncontrolled ringing at switch-on a hysteresis is implemented. The switch-off of the controller can only take place after Active Mode was entered and VVCC falls below 8.5V. The maximum current consumption before the controller is activated is about 160A. When VVCC falls below the off-threshold VCCoff=8.5V the internal reference is switched off and the Power Down reset let T1 discharging the soft-start capacitor CSoftS at pin SoftS. Thus it is ensured that at every startup cycle the voltage ramp at pin SoftS starts at zero. The internal Voltage Reference is switched off if Auto Restart Mode is entered. The current consumption is then reduced to 300A.
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F3 ICE3AS02 / ICE3AS02G / ICE3BS02 / ICE3BS02G
Functional Description
Once the malfunction condition is removed, this block will then turn back on. The recovery from Auto Restart Mode does not require disconnecting the SMPS from the AC line. When Active Burst Mode is entered, the internal Bias is switched off in order to reduce the current consumption to below 1.05mA while keeping the Voltage Reference active as this is necessary in this mode.
VSoftS
max. Startup Phase 5.4V 4V
3.3
Startup Phase
6.5V 3.25k
1V max. Soft Start Phase
DCmax
T2 T3 1V
DC1 DC2
t
RSoftS
SoftS
CSoftS Soft Start C7 Soft-Start Comparator & G7 C2 4V
t1
Gate Driver
t2 t
Figure 6
Startup Phase
0.85V x3.7 PWM OP CS
By means of this extra charge stage, there is no delay in the beginning of the Startup Phase when there is still no switching. Furthermore Soft Start is finished at 4V to have faster the maximum power capability. The duty cycles DC1 and DC2 are depending on the mains and the primary inductance of the transformer. The limitation of the primary current by DC2 is related to VSoftS = 4V. But DC1 is related to a maximum primary current which is limited by the internal Current Limiting with CS = 1V. Therefore the maximum Startup Phase is divided into a Soft Start Phase until t1 and a phase from t1 until t2 where maximum power is provided if demanded by the FB signal.
Figure 5
Soft Start
At the beginning of the Startup Phase, the IC provides a Soft Start duration whereby it controls the maximum primary current by means of a duty cycle limitation. A signal VSoftS which is generated by the external capacitor CSofts in combination with the internal pull up resistor RSoftS, determines the duty cycle until VSoftS exceeds 4V. When the Soft Start begins, CSoftS is immediately charged up to approx. 1V by T2. Therefore the Soft Start Phase takes place between 1V and 4V. Above VSoftsS = 4V there is no longer duty cycle limitation DCmax which is controlled by comparator C7 since comparator C2 blocks the gate G7 (see Figure 5). The maximum charge current in the very first stage when VSoftS is below 1V, is limited to 1.32mA.
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F3 ICE3AS02 / ICE3AS02G / ICE3BS02 / ICE3BS02G
Functional Description 3.4 PWM Section
0.72
The Gate Driver is active low at voltages below the undervoltage lockout threshold VVCCoff.
PWM Section
VCC
PWM-Latch
Oscillator Duty Cycle max
Clock
1
Z1
Gate
Soft Start Comparator PWM Comparator Current Limiting
FF1
Gate Driver
& G9
1
G8
S R Q
Figure 8
Gate Driver
Gate
Figure 7 PWM Section
The driver-stage is optimized to minimize EMI and to provide high circuit efficiency. This is done by reducing the switch on slope when exceeding the external Power Switch threshold. This is achieved by a slope control of the rising edge at the driver's output (see Figure 9).
VGate
ca. t = 130ns
3.4.1 Oscillator The oscillator generates a fixed frequency. The switching frequency for ICE3AS02/G is fOSC = 100kHz and for ICE3BS02/G fOSC = 67kHz. A resistor, a capacitor and a current source and current sink which determine the frequency are integrated. The charging and discharging current of the implemented oscillator capacitor are internally trimmed, in order to achieve a very accurate switching frequency. The ratio of controlled charge to discharge current is adjusted to reach a maximum duty cycle limitation of Dmax=0.72. 3.4.2 PWM-Latch FF1 The oscillator clock output provides a set pulse to the PWM-Latch when initiating the external Power Switch conduction. After setting the PWM-Latch can be reset by the PWM comparator, the Soft Start comparator or the Current-Limit comparator. In case of resetting, the driver is shut down immediately. 3.4.3 Gate Driver The Gate Driver is a fast totem pole gate drive which is designed to avoid cross conduction currents and which is equipped with a zener diode Z1 (see Figure 8) in order to improve the control of the Gate attached power transistors as well as to protect them against undesirable gate overvoltages.
CLoad = 1nF 5V
t
Figure 9 Gate Rising Slope Thus the leading switch on spike is minimized. When the external Power Switch is switched off, the falling shape of the driver is slowed down when reaching 2V to prevent an overshoot below ground. Furthermore the driver circuit is designed to eliminate cross conduction of the output stage. During powerup when VCC is below the undervoltage lockout threshold VVCCoff, the output of the Gate Driver is low to disable power transfer to the seconding side.
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F3 ICE3AS02 / ICE3AS02G / ICE3BS02 / ICE3BS02G
Functional Description 3.5
PWM Latch FF1 Current Limiting Propagation-Delay Compensation Vcsth C10 PWM-OP & G10 C12 0.257V
Current Limiting
3.5.1
Leading Edge Blanking
VSense
Vcsth
tLEB = 220ns
Leading Edge Blanking 220ns
t
Figure 11 Leading Edge Blanking Each time when the external Power Switch is switched on, a leading edge spike is generated due to the primary-side capacitances and secondary-side rectifier reverse recovery time. This spike can cause the gate drive to switch off unintentionally. To avoid a premature termination of the switching pulse, this spike is blanked out with a time constant of tLEB = 220ns. During this time, the gate drive will not be switched off.
Active Burst Mode
10k D1
1pF
CS
Figure 10 Current Limiting Block
3.5.2
Propagation Delay Compensation
There is a cycle by cycle Current Limiting realized by the Current-Limit comparator C10 to provide an overcurrent detection. The source current of the external Power Switch is sensed via an external sense resistor RSense . By means of RSense the source current is transformed to a sense voltage VSense which is fed into the pin CS. If the voltage VSense exceeds the internal threshold voltage Vcsth the comparator C10 immediately turns off the gate drive by resetting the PWM Latch FF1. A Propagation Delay Compensation is added to support the immediate shut down without delay of the Power Switch in case of Current Limiting. The influence of the AC input voltage on the maximum output power can thereby be avoided. To prevent the Current Limiting from distortions caused by leading edge spikes a Leading Edge Blanking is integrated in the current sense path for the comparators C10, C12 and the PWM-OP. The output of comparator C12 is activated by the Gate G10 if Active Burst Mode is entered. Once activated the current limiting is thereby reduced to 0.257V. This voltage level determines the power level when the Active Burst Mode is left if there is a higher power demand.
In case of overcurrent detection, the switch-off of the external Power Switch is delayed due to the propagation delay of the circuit. This delay causes an overshoot of the peak current Ipeak which depends on the ratio of dI/dt of the peak current (see Figure 12).
Signal1 ISense Ipeak2 Ipeak1 ILimit IOvershoot2
Signal2 tPropagation Delay
IOvershoot1
t
Figure 12 Current Limiting
The overshoot of Signal2 is bigger than of Signal1 due to the steeper rising waveform. This change in the slope is depending on the AC input voltage. Propagation Delay Compensation is integrated to limit the overshoot dependency on dI/dt of the rising primary current. That means the propagation delay time between exceeding the current sense threshold Vcsth and the switch off of the external Power Switch is compensated over temperature within a wide range.
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F3 ICE3AS02 / ICE3AS02G / ICE3BS02 / ICE3BS02G
Functional Description
Current Limiting is now possible in a very accurate way. E.g. Ipeak = 0.5A with RSense = 2. Without Propagation Delay Compensation the current sense threshold is set to a static voltage level Vcsth=1V. A current ramp of dI/dt = 0.4A/s, that means dVSense/dt = 0.8V/s, and a propagation delay time of i.e. tPropagation Delay =180ns leads then to an Ipeak overshoot of 12%. By means of propagation delay compensation the overshoot is only about 2% (see Figure 13).
with compensation without compensation
3.6
Control Unit
V
1,3 1,25 1,2
The Control Unit contains the functions for Active Burst Mode and Auto Restart Mode. The Active Burst Mode and the Auto Restart Mode are combined with an Adjustable Blanking Window which is depending on the external Soft Start capacitor. By means of this Adjustable Blanking Window, the IC avoids entering into these two modes accidentally. Furthermore it also provides a certain time whereby the overload detection is delayed. This delay is useful for applications which normally works with a low current and occasionally require a short duration of high current. 3.6.1 Adjustable Blanking Window
VSense
1,15 1,1 1,05 1 0,95 0,9 0 0,2 0,4 0,6 0,8 1 1,2 1,4 1,6 1,8 2
SoftS
6.5V
5k
V
RSoftS
dVSense dt
s
4.4V
1
Figure 13
Overcurrent Shutdown
S1
G2
The Propagation Delay Compensation is realized by means of a dynamic threshold voltage Vcsth (see Figure 14). In case of a steeper slope the switch off of the driver is earlier to compensate the delay.
C3
5.4V
4.8V
&
Auto Restart Mode
VOSC
max. Duty Cycle
C4
off time
G5
VSense Vcsth
Propagation Delay
t
&
Active Burst Mode
FB
C5
1.32V
G6
Signal1
Figure 14
Signal2
Control Unit
t
Figure 15 Adjustable Blanking Window VSoftS is clamped at 4.4V by the closed switch S1 after the SMPS is settled. If overload occurs VFB is exceeding 4.8V. Auto Restart Mode can't be entered as the gate G5 is still blocked by the comparator C3. But after VFB has exceeded 4.8V the switch S1 is opened via the gate G2. The external Soft Start capacitor can
Dynamic Voltage Threshold Vcsth
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F3 ICE3AS02 / ICE3AS02G / ICE3BS02 / ICE3BS02G
Functional Description
now be charged further by the integrated pull up resistor RSoftS. The comparator C3 releases the gates G5 and G6 once VSofts has exceeded 5.4V. Therefore there is no entering of Auto Restart Mode possible during this charging time of the external capacitor CSoftS. The same procedure happens to the external Soft Start capacitor if a low load condition is detected by comparator C5 when VFB is falling below 1.32V. Only after VSoftS has exceeded 5.4V and VFB is still below 1.32V Active Burst Mode is entered. 3.6.2 Active Burst Mode The controller provides Active Burst Mode for low load conditions at VOUT. Active Burst Mode increases significantly the efficiency at light load conditions while supporting a low ripple on VOUT and fast response on load jumps. During Active Burst Mode which is controlled only by the FB signal the IC is always active and can therefore immediately response on fast changes at the FB signal. The Startup Cell is kept switched off to avoid increased power losses for the self supply. 3.6.2.1 Entering Active Burst Mode The FB signal is always observed by the comparator C5 if the voltage level falls below 1.32V. In that case the switch S1 is released which allows the capacitor CSoftS to be charged starting from the clamped voltage level at 4.4V in normal operating mode. If VSoftS exceeds 5.4V the comparator C3 releases the gate G6 to enter the Active Burst Mode. The time window that is generated by combining the FB and SoftS signals with gate G6 avoids a sudden entering of the Active Burst Mode due to large load jumps. This time window can be adjusted by the external capacitor CSoftS. After entering Active Burst Mode a burst flag is set and the internal bias is switched off in order to reduce the current consumption of the IC down to approx. 1.05mA. In this Off State Phase the IC is no longer self supplied so that therefore CVCC has to provide the VCC current (see Figure 17). Furthermore gate G11 is then released to start the next burst cycle once VFB has 3.4V exceeded. It has to be ensured by the application that the VCC remains above the Undervoltage Lockout Level of 8.5V to avoid that the Startup Cell is accidentally switched on. Otherwise power losses are significantly increased. The minimum VCC level during Active Burst Mode is depending on the load conditions and the application. The lowest VCC level is reached at no load conditions at VOUT. 3.6.2.2 Working in Active Burst Mode After entering the Active Burst Mode the FB voltage rises as VOUT starts to decrease due to the inactive PWM section. Comparator C6a observes the FB signal if the voltage level 4V is exceeded. In that case the internal circuit is again activated by the internal Bias to start with switching. As now in Active Burst Mode the gate G10 is released the current limit is only 0.257V to reduce the conduction losses and to avoid audible noise. If the load at VOUT is still below the starting level for the Active Burst Mode the FB signal decreases down to 3.4V. At this level C6b deactivates again the internal circuit by switching off the internal Bias. The gate G11 is released as after entering Active Burst Mode the burst flag is set. If working in Active Burst Mode the FB voltage is changing like a saw tooth between 3.4V and 4V (see Figure 17). 3.6.2.3 Leaving Active Burst Mode The FB voltage immediately increases if there is a high load jump. This is observed by comparator C4. As the current limit is ca. 26% during Active Burst Mode a certain load jump is needed that FB can exceed 4.8V. At this time C4 resets the Active Burst Mode which also
SoftS
6.5V
5k
RSoftS
4.4V
Internal Bias
S1
Current Limiting
&
C3
5.4V
4.8V
G10
C4
Active Burst Mode
FB
1.32V
C5
& G6
C6a
4.0V
C6b
3.4V
& G11
Control Unit
Figure 16
Active Burst Mode
The Active Burst Mode is located in the Control Unit. Figure 16 shows the related components.
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F3 ICE3AS02 / ICE3AS02G / ICE3BS02 / ICE3BS02G
Functional Description
blocks C12 by the gate G10. Maximum current can now be provided to stabilize VOUT. 3.6.3 Protection Mode (Auto Restart Mode) In order to increase the SMPS system's robustness and safety, the IC provides the Auto Restart Mode as a protection feature. The Auto Restart Mode is entered upon detection of the following faults in the system: * VCC Overvoltage * Overtemperature * Overload * Open Loop * VCC Undervoltage * Short Optocoupler
VFB
4.80V 4.00V 3.40V 1.32V
Entering Active Burst Mode
Leaving Active Burst Mode
VSoftS
Blanking W indow
5.40V 4.40V
t
SoftS
CSoftS
5k
6.5V
Control Unit
RSoftS
VCC
VCS
1.00V 0.257V
4.4V 17V
C1
t
4.0V
& G1
Spike Blanking 8.0us
C11
Thermal Shutdown
Tj >140C
Current limit level during Active Burst Mode
S1
VVCC
4.8V
t
FB
5.4V
C4
& G5
Auto Restart Mode
C3
Voltage Reference
8.5V
IVCC
7.2mA
Figure 18
t
Auto Restart Mode
1.05mA
VOUT
Max. Ripple < 1%
t
t
Figure 17
Signals in Active Burst Mode
The VCC voltage is observed by comparator C1 if 17V is exceeded. The output of C1 is combined with both the output of C11 which checks for SoftS<4.0V, and the output of C4 which checks for FB>4.8V. Therefore the overvoltage detection is can only active during Soft Start Phase(SoftS<4.0V) and when FB signal is outside the operating range > 4.8V. This means any small voltage overshoots of VVCC during normal operating cannot trigger the Auto Restart Mode. In order to ensure system reliability and prevent any false activation, a blanking time is implemented before the IC can enter into the Auto Restart Mode. The output of the VCC overvoltage detection is fed into a spike blanking with a time constant of 8.0s. The other fault detection which can result in the Auto Restart Mode and has this 8.0s blanking time is the Overtemperature detection. This block checks for a junction temperature of higher than 140C for malfunction operation.
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F3 ICE3AS02 / ICE3AS02G / ICE3BS02 / ICE3BS02G
Functional Description
Once the Auto Restart Mode is entered, the internal Voltage Reference is switched off in order to reduce the current consumption of the IC as much as possible. In this mode, the average current consumption is only 300A as the only working block is the Undervoltage Lockout(UVLO) which controls the Startup Cell by switching on/off at VVCCon/VVCCoff. As there is no longer a self supply by the auxiliary winding, VCC starts to drop. The UVLO switches on the integrated Startup Cell when VCC falls below 8.5V. It will continue to charge VCC up to 15V whereby it is switched off again and the IC enters into the Start Up Phase. As long as all fault conditions have been removed, the IC will automaticlally power up as usual with switching cycle at the GATE output after Soft Start duration. Thus the name Auto Restart Mode. Other fault detections which are active in normal operation is the sensing for Overload, Open Loop and VCC undervoltage conditions. In the first 2 cases, FB will rise above 4.8V which will be observed by C4. At this time, S1 is released such that VSoftS can rise from its earlier clamp voltage of 4.4V. If VSoftS exceeds 5.4V which is observed by C3, Auto Restart Mode is entered as both inputs of the gate G5 are high. This charging of the Soft Start capacitor from 4.4V to 5.4V defines a blanking window which prevents the system from entering into Auto Restart Mode unintentionally during large load jumps. In this event, FB will rise close to 6.5V for a short duration before the loop regulates with FB less than 4.8V. This is the same blanking time window as for the Active Burst Mode and can therefore be adjusted by the external CSoftS. In the case of VCC undervoltage, ie. VCC falls below 8.5V, the IC will be turn off with the Startup Cell charging VCC as described earlier in this section. Once VCC is charged above 15V, the IC will start a new startup cycle. The same procedure applies when the system is under Short Optocoupler fault condition, as it will lead to VCC undervoltage.
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F3 ICE3AS02 / ICE3AS02G / ICE3BS02 / ICE3BS02G
Electrical Characteristics
4
Note:
Electrical Characteristics
All voltages are measured with respect to ground (Pin 8). The voltage levels are valid if other ratings are not violated.
4.1
Note:
Absolute Maximum Ratings
Absolute maximum ratings are defined as ratings, which when being exceeded may lead to destruction of the integrated circuit. For the same reason make sure, that any capacitor that will be connected to pin 7 (VCC) is discharged before assembling the application circuit. Symbol Limit Values min. max. 500V 22 6.5 6.5 22 6.5 150 150 0.45 0.90 185 90 3 V V V V V V C C W W K/W K/W kV P-DSO-8-8, Tamb < 50C PG-DIP-8-6, Tamb < 50C P-DSO-8-8 PG-DIP-8-6 Human body model1) Internally clamped at 11.5V Unit Remarks
Parameter
HV Voltage VCC Supply Voltage FB Voltage SoftS Voltage Gate Voltage CS Voltage Junction Temperature Storage Temperature Total Power Dissipation
VHV VVCC VFB VSoftS VGate VCS Tj TS PtotDSO8 PtotDIP8
-0.3 -0.3 -0.3 -0.3 -0.3 -40 -55 -
Thermal Resistance Junction-Ambient ESD Capability(incl. HV Pin)
1)
RthJADSO8 RthJADIP8 VESD
According to EIA/JESD22-A114-B (discharging a 100pF capacitor through a 1.5k series resistor)
4.2
Note:
Operating Range
Within the operating range the IC operates as described in the functional description. Symbol Limit Values min. max. 20 130 V C Max value limited due to thermal shut down of controller Unit Remarks
Parameter
VCC Supply Voltage Junction Temperature of Controller
VVCC TjCon
VVCCoff -25
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F3 ICE3AS02 / ICE3AS02G / ICE3BS02 / ICE3BS02G
Electrical Characteristics 4.3
4.3.1 Note:
Characteristics
Supply Section 1 The electrical characteristics involve the spread of values within the specified supply voltage and junction temperature range TJ from - 25 C to 130 C. Typical values represent the median values, which are related to 25C. If not otherwise stated, a supply voltage of VCC = 15 V is assumed. Symbol min. Limit Values typ. 160 1.05 0.88 0.2 5.5 300 max. 220 1.60 20 7.0 A mA mA A mA A IFB = 0 ISofts = 0 VVCC =15V VFB = 3.7V, VSoftS = 4.4V VVCC = 9.5V VFB = 3.7V, VSoftS = 4.4V VVCC =14V VVCC = 0V VVCC =14V VVCC =16V, VHV = 450V Unit Test Condition
Parameter
Start Up Current VCC Charge Current Leakage Current of Start Up Cell Supply Current with Inactive Gate Supply Current in Auto Restart Mode with Inactive Gate Supply Current in Active Burst Mode with Inactive Gate VCC Turn-On Threshold VCC Turn-Off Threshold VCC Turn-On/Off Hysteresis
IVCCstart IVCCcharge1 IVCCcharge2 IStartLeak IVCCsup1 IVCCrestart
0.55 -
IVCCburst1 IVCCburst2 VVCCon VVCCoff VVCChys
14.2 8.0 -
1.05 0.95 15.0 8.5 6.5
1.25 1.15 15.8 9.0 -
mA mA V V V
4.3.2
Supply Section 2 Symbol min. ICE3AS02 ICE3AS02G ICE3BS02 ICE3BS02G Limit Values typ. 7.0 6.5 max. 8.5 8.0 mA mA VSoftS = 4.4V IFB = 0, CLoad=1nF Unit Test Condition
Parameter Supply Current with Active Gate
IVCCsup2 IVCCsup2
-
4.3.3
Internal Voltage Reference Symbol min. Limit Values typ. 6.50 max. 6.63 V measured at pin FB IFB = 0 Unit Test Condition
Parameter
Trimmed Reference Voltage
VREF
6.37
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F3 ICE3AS02 / ICE3AS02G / ICE3BS02 / ICE3BS02G
Electrical Characteristics
4.3.4 Parameter PWM Section Symbol min. Fixed Oscillator Frequency ICE3AS02 ICE3AS02G ICE3BS02 ICE3BS02G Max. Duty Cycle Min. Duty Cycle PWM-OP Gain Voltage Ramp Max Level VFB Operating Range Min Level VFB Operating Range Max level FB Pull-Up Resistor SoftS Pull-Up Resistor
1)
Limit Values typ. 100 100 67 67 0.72 3.7 0.85 0.7 20 50 max. 108 106 73 71 0.77 3.9 4.75 27 62
Unit
Test Condition
fOSC1 fOSC2 fOSC1 fOSC2 Dmax Dmin AV VMax-Ramp VFBmin VFBmax RFB RSoftS
92 94 61 63 0.67 0 3.5 0.3 16 39
kHz kHz kHz kHz Tj = 25C Tj = 25C
VFB < 0.3V
V V V k k CS=1V, limited by Comparator C41)
Design characteristic (not meant for production testing) Control Unit Symbol min. Limit Values typ. 4.00 4.40 5.40 1.3 4.80 1.30 4.00 max. 4.15 4.57 5.60 4.98 1.37 4.15 V V V mA V V V VFB > 5V VFB = 4V VFB > 5V VSoftS = 0V VSoftS > 5.6V VSoftS > 5.6V After Active Burst Mode is entered Unit Test Condition
4.3.5 Parameter
Deactivation Level for SoftS Comparator C7 by C2 Clamped VSoftS Voltage during Normal Operating Mode Activation Limit of Comparator C3 SoftS Startup Current Over Load & Open Loop Detection Limit for Comparator C4 Active Burst Mode Level for Comparator C5 Active Burst Mode Level for Comparator C6a
VSoftSC2 VSoftSclmp VSoftSC3 ISoftSstart VFBC4 VFBC5 VFBC6a
3.85 4.23 5.20 4.62 1.23 3.85
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F3 ICE3AS02 / ICE3AS02G / ICE3BS02 / ICE3BS02G
Electrical Characteristics
Parameter Symbol min. Active Burst Mode Level for Comparator C6b Overvoltage Detection Limit Thermal Shutdown1) Spike Blanking
1)
Limit Values typ. 3.40 17.1 140 8.0 max. 3.55 18.1 150 -
Unit
Test Condition
VFBC6b VVCCOVP TjSD tSpike
3.25 16.1 130 -
V V C s
After Active Burst Mode is entered VFB > 5V VSoftS < 4.0V
The parameter is not subject to production test - verified by design/characterization
Note:
The trend of all the voltage levels in the Control Unit is the same regarding the deviation except VVCCOVP and VVCCPD Current Limiting Symbol min. Limit Values typ. 1.02 max. 1.07 V dVsense / dt = 0.6V/s (see Figure 14) Unit Test Condition
4.3.6 Parameter
Peak Current Limitation (incl. Propagation Delay Time of external MOS) Peak Current Limitation during Active Burst Mode Leading Edge Blanking CS Input Bias Current
Vcsth
0.97
VCS2 tLEB ICSbias
0.232 -1.0
0.257 220 -0.2
0.282 0
V ns A VSoftS = 4.4V VCS =0V
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F3 ICE3AS02 / ICE3AS02G / ICE3BS02 / ICE3BS02G
Electrical Characteristics
4.3.7 Parameter Driver Section Symbol min. GATE Low Voltage VGATElow -0.2 GATE High Voltage VGATEhigh GATE Rise Time (incl. Gate Rising Slope) GATE Fall Time GATE Current, Peak, Rising Edge GATE Current, Peak, Falling Edge
1) 2)
Limit Values typ. 0.8 1.6 0.2 11.5 10.5 7.5 150 55 max. 1.2 1.5 2.0 0.7
Unit
Test Condition
V V V V V V V V ns ns A A
VVCC = 5 V IGate = 5 mA VVCC = 5 V IGate = 20 mA IGate = 0 A IGate = 20 mA IGate = -20 mA VVCC = 20V CL = 4.7nF VVCC = 11V CL = 4.7nF VVCC = VVCCoff + 0.2V CL = 4.7nF VGate = 2V ...9V1) CL = 4.7nF VGate = 9V ...2V1) CL = 4.7nF CL = 4.7nF2) CL = 4.7nF2)
trise tfall IGATE IGATE
-0.5 -
Transient reference value Design characteristic (not meant for production testing)
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F3 ICE3AS02 / ICE3AS02G / ICE3BS02 / ICE3BS02G
Typical Performance Characteristics
5
Typical Performance Characteristics
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F3 ICE3AS02 / ICE3AS02G / ICE3BS02 / ICE3BS02G
Outline Dimension
6
Outline Dimension
PG-DIP-8-6 (Leadfree Plastic Dual In-Line Outline)
Figure 19 PG-DIP-8-6 (Leadfree Plastic Dual In-Line Outline)
P-DSO-8-8 (Plastic Dual Small Outline)
Figure 20 P-DSO-8-8 (Plastic Dual Small Outline)
Dimensions in mm
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